Ratio computing circuit

ABSTRACT

A ratio computer serially accepts a reference signal pulse and two condition indicating signal pulses from a detector. The computer selects the reference pulse, which is then integrated. The resulting voltage represents the energy in the reference signal pulse. The two condition indicating signal pulses are divided by the integral of the reference signal pulse to obtain the desired ratios.

United States Patent Warren Apr. 1, 1975 RATIO COMPUTING CIRCUIT3.514.700 5/1970 Kalin et al. 324/l40 D 1 1 Invent: Carlton Webster.153%:833 311333 ififii'l iijiiiijjiiii:ijjiiiiiiiiiii: fiifilil [73]Assignee: Sybron Corporation, Rochester,

N.Y. Primary Examiner-Stanley D. Miller, Jr. (22} Filed: Dec. 17, 1973gttetggzaeg yiggem, or FirmTheodore B. Roessel; J. [2l] App]. No.:425,256

[57] ABSTRACT [52] Cl f gg s 4 5 A ratio computer serially accepts areference signal {51] l Cl 5 7/16 pulse and two condition indicatingsignal pulses from a {58] 2.1L detector. The computer selects thereference pulse. 0 324/l40 which is then integrated. The resultingvoltage represents the energy in the reference signal pulse. The twocondition indicating signal pulses are divided by the [56] ReferencesCited integral of the reference signal pulse to obtain the de- UNITEDSTATES PATENTS sired ratios 3.2921113 12/1966 Golahny 328/l6l 314731143l(l/l%9 James 328/l6l 3 Claims 6 Drawing Flg'lm TO GATES 31 L 4 I i I Nc i 12 13 14 15 l GATE l l l 1 Ut-J eclofl -4 l filfi N O CON l cmoun 2FIG. 6 i AMP cmcbn GATE R C U I 111.0. 47 1? 1 1 I FROM 0.1:. REF I 1 ml @5335 N O Q N o. HOLDING g l GATE CIRCUIT GATE 0 RCUIT FIG 5 5 A 7 e a'9 fi l FIRST SECOND PULSE PULSE OUTPUT OUTPUT cmcurr CIRCUIT SCSI (IF 4FROM D. C. DECOUPLING CIRCUIT FIG.4

FROM SECOND PULSE GEN. FIG. 6

FIRST PULSE GEN TO GATES 3,4,I0,I4

TO GATES I'ro GATES 30,37,319

SECOND PULSE GEN MAGNETIC MEMBER I I I I I I I I I I I I I TO D.C.DECOUP- LING CIRCUITS FIG. 6

RATIO COMPUTING CIRCUIT BACKGROUND OF THE INVENTION This inventionrelates to computing ratios and more particularly concerns measuring themoisture content of paper and like materials.

The predominant constituent of paper is cellulose in the form of woodand other fibers whose natural form and substance has been alteredmechanically and/or chemically and which are held together mainly bydirect molecular bonding between cellulose molecules. Bonding issometimes reinforced by an adhesive imprcgnant of the fibrous structure,and a mechanical interwining of fibers, and friction, also contribute alittle to holding the fibers together.

Mositure (that is, liquid water) is also generally present in thefibrous structure, and various of an enormous range of other substancesusually may be found impregnating the fibrous structure and/or coatingthe paper surface. These structural and compositional characteristicsaffect radiation. determine the functional properties of the end productof the paper manufacturing process. and are varied in manufacturing toobtain the practically numberless variety of papers.

When a beam of radiation is projected on paper, or on a material ofanalogous structure and composition, a number of interactions betweenthe material and the radiation will occur.

A US. Pat. No. 3,551,678 entitled Material Parometer Measurement UsingInfrared Radiation of Richard L. Mitchell, assigned to the assignee ofthe present application discloses a non-contacting instrument forcontinuous on line measurement of paper moisture. lt utilizes infraredtransmittance measurements at three wavelengths for the moisturedetermination. One wavelength is in a water absorption band. one is in acellulose absorption band and one is at a nearby wavelength not in anabsorption band and thus useful as a reference. The ratio of thetransmittance in the moisture band to the transmittance at the referencewavelength is an indication of sheet moisture. This is only a relativeindication however. since the relationship of the transmittance ratio tothe moisture is a function of filter and paper characteristics (bandpassfilters) are used to selcct the three wavelengths). No two bandpassfilters are identical and sensitivity to moisture therefore varies fromset to set. With a given of filters, the relationship of thetransmittance ratio to total sheet moisture varies with both basisweight and chemical commsition, (but not density or surface texture). ofthe paper. The ratio of transmittance in the water absorption band totransmittance just outside the band (reference wavelength) is used toeliminate such common mode effects as scattering of the beam by thepaper or foreign material on the windows, or signal variations caused bymovement of the paper web. The transmittance ratio can be measuredaccurately on line, while the absolute transmittance cannot.

The ratio of transmittance in the cellulose absorption band to that atthe reference wavelength is a similar indication of the cellulosecontent of the sheet, and thus infers the basis weight. Again, therelationship is dependent on filter and paper characteristics. It isalso affected somewhat by moisture content. as the two absorption bandsare close together, and by the chemical composition.

The moisture gauge in the Mitchell patent consists of source anddetector heads and an electronic circuitry package to process thedetector signal. The source contains a infrared lamp arranged with anoptical system, a motor and filter disk (containing the three bandpassfilters), and three pickup coils to indicate the position of the filterdisk. In operation, the disk spins and the approach of each filter tothe output port is indicated by a synch pulse from the appropriatepickup coil. The source output is a beam in infrared bursts at the threewavelengths.

The detector contains an infrared sensitive cell having output signalswhich are fed through an amplifier. A ratio computer computes the twoaforementioned ratios from the detector signals. The ratios are used toderive the moisture content of the paper. An improved ratio computer isthe subject of this invention.

A US. Pat. No. 3,5l4,700. entitled Voltage Rate Computer of Walter F.Kalin et al. assigned to the assignee of the present application.disclosed a ratio computer. The circuit disclosed by Kalin includes avariable gain amplifier having an input disposed to receive signalvoltage pulses from a detector. The output on the variable gainamplifier was gated to a holding circuit during the duration of areference pulse. The holding circuit compared the output of the variableagain amplifier to a reference voltage. The output of the holdingcircuit was a question of the difference between the said output of thevariable gain amplifier and the said reference voltage. The outputvoltage of the holding circuit control of the gain of the variable gainamplifier by means of a gated feedback loop. The property of the loop isto adjust the gain of the variable gain amplifier until the amplitude ofits output is equal to that of the DC reference voltage. The gain isthen held constant for the remainder of the cycle. The variable gainamplifier and feedback loop acts as a dividing circuit. Subsequentsignal pulses pass through the amplifier and are effectively divided bythe magnitude of the reference pulse. The output of the amplifier isgated into individual holding circuits for further process of theratios.

While this circuit has found successful application, the stability ofthe system may be guaranteed only when the time constant of the loopexceeds a minimum time constant which is related to the sample rate. Theminimum time constant limitation has adverse effects on tracking betweenactual ratios and measured ratios if the changes in the perimeters areless than the time constant. It is, therefore, highly desirable toobtain ratios by means of a more stable circuit.

It is, therefore, an object of this invention to provide a new andimproved ratio computer circuit for paper moisture gauges and the like.

It is a further object of this invention to provide a new and improvedstable ratio computing circuit for paper moisture gauges.

It is still another object of this invention to provide a new andimproved ratio computing circuit for paper moisture gauges havingminimum tracking error.

It is an additional object of this invention to provide a new andimproved ratio computing cicuit for paper moisture gauges having a highspeed of reference.

SUMMARY OF THE INVENTION A ratio computer that computes the ratio of atleast one periodic input signal to a periodic reference signal. Theinput of the computer during the presence of the reference signal isapplied to circuitry which holds a function of the reference signaluntil a subsequent cy cle. The computer includes an automatic gaincontrol circuit. The automatic gain control circuit is in a closed loopconfiguration during receipt of a reference signal from a prior cycle.The gain of the automatic gain control circuit is set to be a functionof the reference signal. The gain control loop is then opened so thatthe gain of the circuitry remains a constant for the remainder of thecycle. Subsequent input signals are amplified by the automatic gaincontrol circuitry. The output of the automatic gain control circuitrepresents the ratio of a particular input signal relative to a functionof the reference signal of a prior cycle. The output of the automaticgain control circuit is connected during the presence of an input signalto a computer output circuit corresponding to the input signal. Afeature of this invention is that the reference signal is converted to aDC level before introduction to the automatic gain control circuit. TheDC level is held until a subsequent cycle.

Any transients occurring as a result of the DC conversion will havedecayed to negligible amplitude during the holding period, so that theinput of the automatic gain control circuit sees a DC level at alltimes. The time constant of the circuit is thereby kept at a minimum asmost of the system transients have been eliminated.

BRIEF DESCRIPTION OF THE DRAWINGS DESCRIPTION OF THE PREFERREDEMBODIMENT In FIG. 1, disk 42, is the filter disk of the aboveidentified Mitchell application including the three filters 43, 44 and45 mounted thereon. The filters in 43, 44 and 45, pass through a beam orradiation and transmit different wave lengths actually narrow spectrumbands). The filtered radiation is projected on a sheet of paper,

- and those portions thereof which emerge from the paper are detected bysuitable means providing an output corresponding to the intensity of thedetected radiation, this output being transformed by suitable means,such as electrical circuitry, represented by the detector circuit 47into signal preferably electrical quantities such as voltage, whosemagnitude are proportional to said intensities, and which are suitablefor use in the systems about to be described.

In practice, disk 42 is rotated a uniform rate of speed. In eachrevolution, each filter is in the radiation path for less than third ofthe cycle. The dimensions of disk in filters in the radio in angularpositions of the filters are such that in each revolution, not more than1 filter is wholly or partly in the path of the radiation in acontinuous interval. For DC decoupling circuit 1 the output signal fromthe detector 47. The output signal accepts from the detector appears asa series of negative going voltage pulses, each having the sameduration, but the amplitude being representative of conditions. Theseries of pulses consist of cycles of three signal pulses, a referenceindicating signal pulse and two condition indicating signal pulses. Eachof said cycles correspond to a rotation to disk body 42.

For each of the three signal pulses there is provided by gate controlmeans 46. an individual synchronizing pulse.

Singal pulses are passed through the DC coupling circuit to a first node2, DC components of the signal pulses being removed by the DC decouplingcircuit. The output of the DC coupling circuit I has a zero volt baseline with a negative pulse representing each signal pulse. The output ofthe DC coupling circuit is directed in one of two branches 5 and 6selected by series gates 3 and 4. Series gate 3 is normally open and isclosed during the presence ofthe first synchronizing pulse. Series gate4 is normally closed and is opened during the presence of the firstsynchronizing pulse. It is, therefore, seen that during the first signalpulse, from the detector 47 which is considered the reference pulse, the

output of the DC decoupling circuit is gated into' branch 5. At allother times during the cycle, the output of the DC coupling circuit 1 isgated through branch 6. Considering, now, a reference signal pulse; theoutput of the DC decoupling circuit 1 is gated into branch 5. The outputof the DC coupling circuit 1 is integrated by the integrator circuit 7.The process of integration assures fast measurement of the referencepulse. During the second signal pulse a series gate 8 at the output ofthe integrating circuit 7 is closed. The integral of the referencesignal pulse is transferred by a gate 8 to holding circuit 9. Theintegral is held in the holding circuit 9 for the remainder of thecycle. At the beginning of the next subsequent cycle, during thereference signal pulse, series gate 10 is closed allowing the integralto appear at a second node load 11. The integral of the reference signalpasses through the variable gain amplifier 12 through a DC decouplingcircuit 13 through a series gate 14 to controller circuit [5. Controllercircuit 15 is in communication with the variable gain amplifier 12 by afeedback loop 16. The controller circuit 15 is also in a communicationwith a reference voltage source 17. The property of this loop is for thecontroller circuit to adjust the gain of the variable gain amplifier 12such that the output of variable gain amplifier 12 is substantiallyequal in amplitude to that of the reference voltage source 17. Theresult is at the gain of the variable gain amplifier 12 is inverselyproportional to the amplitude of the integral of the reference signalpulse. The gain is maintained as a constant for the remainder of thecycle.

During the second signal pulse, the output of the DC decoupling circuit1 is gated to branch 6 through gate 4 to the second node 11. The outputis then amplified by the variable gain amplifier 12. As aforementioned,the gain of variable gain amplifier I2 is inversely proportional to theintegral of reference signal pulse. This operation, therefore, isequivalent of dividing the second signal pulse by the integral of thereference signal pulse. The output of variable gain amplifier 12 passesthrough DC decoupling circuit 13. During the second signal pulse, theoutput of DC decoupling circuit 13 is in communication with holdingcircuit 18 by a gating means 19. During the third signal pulse, theoutput of DC decoupling circuit I is also gated through branch 6 by agate 4, through the variable gain amplifier 12, through the DCdecoupling circuit 13. During the third signal pulse, the output of DCdecoupling circuit 13 is connected to output holding circuit by thegating means 19. Output holding circuit 18 holds until the next cycle,the ratio of the second signal pulse divided by the integral of thefirst reference signal pulse. Output holding circuit 20 holds the signalrepresentative of the ratio of third signal pulse divided by theintegral of the reference signal pulse. Strictly speaking, the integralis that of the reference pulse of the previous cycle. However, becauseof the fast repetition rate, of the cycle. this should introduce littleerror.

FIG. 2 is a detail of the DC decoupling circuit 1. This circuit is alsoused for the DC decoupling circuit 13. At the input of the decouplingcircuit, there is a series DC blocking decapacitor 21. In series withthe output, of the blocking capacitor 21 and the output on a DC circuitthere is interposed a non-inverting operational amplifier 22. Thepurpose of a non-invering operational amplifier 22 is to prevent thedischarge of a blocking capacitor for the duration of a signal pulse.The output of the amplifier 22 has a zero volt base line with a negativepulse representing each signal pulse. interposed between the blockingcapacitor 21 and the noninverting operational amplifier 22 there is anormally open shunt gate 23 to ground. The gate 23 is turned oninbetween signal pulses by means of a gating signal from a nor-gate 24to the shut gate 23. The nor-gate 24 generates this gating signal in theabsence of any of the three synchronizing pulses. In this manner, any DCcomponent across the DC blocking capacitor 21 is discharged between eachsynchronizing pulse.

FIG. 3 is a more detailed diagram of branch 5 which extends from thefirst node 2 to the second node 1 I. Series gate 3 closes during thereference signal pulse and allows the DC decoupled reference signalpulse to be integrated by integrating circuit 7. Integrating circuit 7includes an inverting operational amplifer 25 having a feedbackcapacitor 26. During the second signal pulse. gate 9 closes to store theresulting DC level on capacitor 27 of the holding circuit 9. The outputon the holding circuit 9 includes a non-inverting buffer amplifier 28which prevents a discharge of capacitor 27. Buffer amplifier 28 mayinclude a variable voltage source 29 which is used for calibrationpurposes. This is used to adjust the zero offset of amplifier 28 tomatch the combined zero offsets amplifiers 25 and 28 to amplifier 22.During the third signal pulse, a normally open gate 30 discharges thefeedback capacitor 26 of the integrating circuit 7. At the beginning ofthe next cycle, during the first signal pulse, gate 10 closes whichallow the output of holding circuit 9 to appear at node II. The outputof the holding circuit 9 is a DC level representing the energy in lastreference signal pulse.

FIG. 4 is a detailed diagram of a dividing circuit 3] first seen in FIG.I. We will first consider the operation of the circuit during the firstsignal pulse which is considered the reference signal pulse. At node 11,there exists a positive DC level representing the energy in the lastenergy signal pulse. This level is amplified by a variable gainamplifier I2. The variable gain amplifier 12 includes an invertingvariable gain amplifier 32 whose gain is controlled by an N channelfield-effect transistor 33. This transistor 33 is used as a voltagecontrolled feedback resistor. The transistor 33 is ope rated atmillivolt levels in order to utilize its purely resistivecharacteristics. The output of the variable gain amplifier I2 isconnected by a DC decoupling circuit 13 through the series gate 14 tothe controller circuit 15. The DC decoupling circuit 13 has beendescribed in detail by FIG. 2. The controller circuit 15 includes aninverting inte grator amplifier 34 having two inputs, one of whichaccepts the output of the variable gain amplifier 12. The other input isconnected to the reference voltage source 17. The output of thecontroller circuit 15. is connected by a feedback line 16 to thetransistor 33 of the variable gain amplifier 12. A characteristic of anoperational amplifier in a close loop configuration, such as is used inthe controllers circuit 15. is for the difference of its inputs toapproach zero. It follows the output of the controller circuit 15adjusts the gain of the variable gain amplifier 12 until the output ofthe variable gain amplifier I2 is substantially equal to the level ofthe reference voltage 17 coming into controller circuit 15. This loopsettles completely before gate 14 opens and the resulting output controlvoltage from the controller circuit 15 is held by the capacitor 35 untilthe gate 14 closes again during the next cycle. Again, with amplifier 12has now been set equal to the reference voltage from source 17 dividedby the reference signal pulse energy. Thus, the gain of the variablegain amplifier 12 is inversely proportional to the reference pulsesignal and is held constant for the duration of the cycle. upon thecompletion of a reference signal pulse, gate 14 opens up. Subsequentsignal pulses form branch 6 appears at node 11 and are amplified by thevariable gain amplifier 12. The output appears through the DC couplingcircuit 13 and represents the ratio of the subsequent signal pulsedivided by the integral of the references signal pulse. For each cycle,there will appear two ratios which are individually gated to holdingcircuits.

FIG. 5 diagrams the details of gating means 19, and the output circuitsl8 and 20. During the second signal pulse the output from the DCdecoupling circuit appears across the normally open gates 36 and 37.Gate 36 is closed by the second synchronizing pulse. The output isthereby connected to holding circuit 18. At the end of the secondsynchronizing pulse, normally closed shut gate 38 is closed dischargingany offset at the input of holding circuit 18. During the third signalpulse, gate 37 is closed by action of the third synchronizing pulsethereby applying the output from the DC decoupling circuit 13 throughthe gate 37 to the holding circuit 20. At the end of the third pulse,normally closed shut gate 39 is closed discharging any offset in theinput of holding circuit 20. Holding circuits l8 and 20 are identical indesign. A high order active filter 40 may be used to convert pulseoutputs to DC levels by attenuating frequencies at the pulse repetitionrate, while still allowing first response. The external gain adjust 4]is provided. Alternatively, the active filter may be replaced by anintegrating type sample and hold scheme similar to that used in branch 5of FIG. 1 for faster response.

In FIG. 6, gate control means 46 is depicted as having a magnetic member42A mounted for rotation about an axis 428. Conveniently, member 42A ismounted on the periphery of disk 42, making that axis 42B the axis ofrotation of disk 42 (not shown in FIG. 6). Pick up coils 43A, 44A and45A are equally spaced about and closely adjacent to the path of member42A. As member 42A rotates, its passing a pick up coil to generate apulse therein. Each such pulse is coupled to a correspending one ofpulse generators 43B, 44B and 45B of convenient construction, as forexample, mono stable vibrators constructed of predetermined duration.These pulses are transmitted to the gates indicated in the figure. Eachpulse starts just before the associated detector signal pulse and endjust after the associated detector signal pulse. These pulses are alsofeed to a NOR gate whose output is a pulse occurring in the intervalbetween detector signal pulse. The output pulse from the NOR right gateis feed to the DC decoupling circuits 1 and 13 to obtain the device DCoutputs representation of the ratios.

A feature of this invention is that the reference signal is converted toa DC level before introduction to the automatic gain control circuit.The DC level is held until a subsequent cycle. Any transients occurringas a result of the DC conversion will have decayed to negligibleamplitude during the holding period, so that the input of the automaticgain control circuit sees a DC level at all times. The time constant ofthe circuit is thereby kept at a minimum as most of the systemtransients have been eliminated.

The disclosed ratio computer has exceptionally stable circuitry andprovides a good correlation between actual ratio and measured ratiosindependent of sample rate.

Although the invention has been described above in the form of a ratiocomputer for computing the ratio of the amplitude of a input signalrelative to the amplitude of a reference signal, it is to be understood,that the invention would also apply to other parameters of the input andrefernce signals such as, for example, pulse width. In the case of pulsewidth ratio circuits, the block diagram of FIG. 1 can be modified byincluding a pulse width to analog convertor circuit between the outputof the DC decoupling circuit 1 and the node 2. Such pulse width toanalog convertor circuits are well known in the art such as, forexample, the type disclosed in the US. Pat. No. 3,590,250 issued on June29, l97l, to Richard L. Witkover and entitled Valve and Pulse-WidthModulated Data Link Using lnfrared Light To Control and Monitor PowerSupply For Modulator For High-Energy Accelerator." In such a case, thesignals at,the output circuits [8 and will be a ratio of the duration ofthe input signals relative to the duration of the reference signals ofthe prior periodic signal.

I claim:

I. A ratio computer comprising:

automatic gain control circuit means having a signal input circuit, asignal output circuit, and a gain control input circuit;

circuit means for receiving periodically recurring cycles of signals,each cycle including a reference signal and at least one input signal;

a computer output circuit;

first gating circuit means synchronized to said periodic signals foralternately connecting the signal output circuit to said gain controlinput circuit and to said computer output circuit;

second gating circuit means receiving said periodic signal andsynchronized thereto, for storing a signal that is a function of themagnitude of a parameter of the received reference signal and applyingthe stored signal to said signal input circuit during a subsequent cycleof said periodic signals while said first gating circuit means connectssaid signal output circuit to said gain control input circuit, and

third gating circuit means receiving said periodic signals andsynchronized thereto for applying said input signal to said signal inputcircuit while said first gating circuit means connects said signal output circuit to said computer output circuit so that the signal at thecomputer output circuit is a ratio of the magnitude of the parameter ofsaid input signal that corresponds to said reference signal parameterrelative to the magnitude of said reference signal parameter of theprior cycle to the periodic signals.

2. A ratio computer as defined in claim 1 wherein:

said parameter of said input signal is a function of the amplitude ofsaid input signal and;

said parameter of said reference signal is a function of the amplitudeof said reference signal.

3. A ratio computer as defined in claim 2 wherein:

said second gating circuit means includes a converting circuit means forconverting the amplitude of the reference signal to a DC signal.

4. A ratio computer as defined in claim 3 wherein said convertingcircuit means:

includes an integrating circuit for integrating the received referencesignal and a holding circuit for storing the integrated reference signalfor an additional cycle. 5. A ratio computer as defined in claim 2wherein second said gating circuit means includes:

an integrating circuit means; an input gate synchronized to saidperiodic signals for translating the reference signals to saidintegrating means; a holding circuit; circuit means for transferring anintegrated output signal from said integrating circuit means to saidholding circuit, and an output gate, synchronized to said periodicsignals, for translating an output signal from said holding circuit tosaid signal input circuit. 6. A ratio computer as defined in claim 5wherein: said transferring circuit means includes a gating circuit,synchronized to said periodic signals for trans lating the output ofsaid integrating circuit means to said holding circuit during theabsence of the reference signal. 7. A ratio computer as defined in claim6 wherein: said periodic signals comprise the reference signal and aplurality ofinput signals, in consecutive sequence; said computercircuit output includes a plurality of output circuits, a separate onefor each of said plurality of input signals; and said first gatingcircuit means includes a plurality of gates, a separate one connectedbetween said signal output circuit and each of said plurality of outputcircuits, said plurality of gates being synchronized to said inputsignals to translate their respective output signals from said outputcircuits to the appropriate one of the plurality output circuits. 8. Amethod for computing the ratio of the amplitude of a periodic inputsignal as a function of the amplitude of a periodic reference signal,wherein said input and inverse proportion to said integral during saidsubsequent cycle, and

amplifying said periodic input signals by said variable gain amplifierso that the output signal of said variable gain amplifier isrepresentative of the ratio of the amplitude of said reoccurring inputsignals to the integral of said periodic reference signal.

1. A ratio computer comprising: automatic gain control circuit meanshaving a signal input circuit, a signal output circuit, and a gaincontrol input circuit; circuit means for receiving periodicallyrecurring cycles of signals, each cycle including a reference signal andat least one input signal; a computer output circuit; first gatingcircuit means synchronized to said periodic signals for alternatelyconnecting the signal output circuit to said gain control input circuitand to said computer output circuit; second gating circuit meansreceiving said periodic signal and synchronized thereto, for storing asignal that is a function of the magnitude of a parameter of thereceived reference signal and applying the stored signal to said signalinput circuit during a subsequent cycle of said periodic signals whilesaid first gating circuit means connects said signal output circuit tosaid gain control input circuit, and third gating circuit meansreceiving said periodic signals and synchronized thereto for applyingsaid input signal to said signal input circuit while said first gatingcircuit means connects said signal output circuit to said computeroutput circuit so that the signal at the computer output circuit is aratio of the magnitude of the parameter of said input signal thatcorresponds to said reference signal parameter relative to the magnitudeof said reference signal parameter of the prior cycle to the periodicsignals.
 2. A ratio computer as defined in claim 1 wherein: saidparameter of said input signal is a function of the amplitude of saidinput signal and; said parameter of said reference signal is a functionof the amplitude of said reference signal.
 3. A ratio computer asdefined in claim 2 wherein: said second gating circuit means includes aconverting circuit means for converting the amplitude of the referencesignal to a DC signal.
 4. A ratio computer as defined in claim 3 whereinsaid converting circuit means: includes an integrating circuit forintegrating the received reference signal and a holding circuit forstoring the integrated reference signal for an additional cycle.
 5. Aratio computer as defined in claim 2 wherein second said gating circuitmeans includes: an integrating circuit means; an input gate synchronizedto said periodic signals for translating the reference signals to saidintegrating means; a holding circuit; circuit means for transferring anintegrated output signal from said integrating circuit means to saidholding circuit, and an output gate, synchronized to said periodicsignals, for translating an output signal from said holding circuit tosaid signal input circuit.
 6. A ratio computer as defined in claim 5wherein: said transferring circuit means includes a gating circuit,synchronized to said periodic signals for translating the output of saidintegrating circuit means to said holding circuit during the absence ofthe reference signal.
 7. A ratio computer as defined in claim 6 wherein:said periodic signals comprise the reference signal and a plurality ofInput signals, in consecutive sequence; said computer circuit outputincludes a plurality of output circuits, a separate one for each of saidplurality of input signals; and said first gating circuit means includesa plurality of gates, a separate one connected between said signaloutput circuit and each of said plurality of output circuits, saidplurality of gates being synchronized to said input signals to translatetheir respective output signals from said output circuits to theappropriate one of the plurality output circuits.
 8. A method forcomputing the ratio of the amplitude of a periodic input signal as afunction of the amplitude of a periodic reference signal, wherein saidinput and reference signals are periodically reoccurring signals, saidmethod comprising: integrating said periodic reference signal to obtainthe integral of the amplitude of said periodic reference signal; holdingsaid integral until the subsequent cycle of the reoccurring signals;adjusting the gain of a variable gain amplifier in an inverse proportionto said integral during said subsequent cycle, and amplifying saidperiodic input signals by said variable gain amplifier so that theoutput signal of said variable gain amplifier is representative of theratio of the amplitude of said reoccurring input signals to the integralof said periodic reference signal.